Principal FPGA Engineer

  • Permanent
  • New York
  • Location: New York, New York
  • Type: Permanent
  • Job #90274

My client is supported by top-tier investors.They are at the forefront of delivering real-time, actionable insights from the radio spectrum using compact, flexible sensors powered by edge-based ML. Their product offers significant defense applications with user-friendly interfaces that simplify understanding of the RF environment.

The company is assembling a highly talented team to tackle some of the most exciting and technically demanding projects in the industry.

While teamwork and collaboration are core values, the company also fosters a culture of independence, allowing individuals to experiment, undertake personal initiatives, and act in the best interests of the organization. In-person collaboration is highly prioritized, and the team operates from a spacious NYC office with room for new members to join.

The company strongly values continuous improvement through feedback and iteration, encouraging the testing of ideas to achieve the best results. Mistakes are seen as part of the process, provided they contribute to better solutions.

Responsibilities

  • Design, develop, and integrate FPGA platforms targeting Xilinx FPGAs.
  • Develop and maintain BSPs (Board Support Packages) for Petalinux integration.
  • Design and verify custom IP blocks to implement or accelerate DSP and AI algorithms, interfacing with system software.
  • Contribute to the architecture and design of Embedded Linux-based systems, efficiently distributing processing tasks among CPU, GPU, and custom accelerators to maximize performance.

Requirements

  • Expertise in Xilinx Vivado & Vitis environments.
  • Experience in end-to-end FPGA system design.
  • Proficiency in developing FPGA systems from scratch, specifically for Zynq Ultrascale+.
  • Strong skills in SystemVerilog and/or VHDL.
  • Proficiency in C/C++.
  • Eligibility for US Security Clearance.

Nice-to-Haves

  • Experience using Vitis AI, Brevitas+FINN, and/or Vitis HLS toolchains.
  • Experience deploying ML models on embedded devices.
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